The invention relates to a charge-coupled device of the buried-channel type comprising a semiconductor substrate of a first conductivity type which is provided at a surface with a zone of the first conductivity type for storage and transport of packages of electric charge carders from a first charge storage location to a second charge storage location, which zone is separated from the substrate of the first conductivity type by an interposed zone of the second conductivity type opposite to the first, while the surface is provided with a system of electrodes for applying clock voltages separated from the buried channel by an interposed dielectric layer and connected to a voltage source by means of which voltages are applied, an inversion layer of the second conductivity type being formed below the system of electrodes at the interface between the buried channel and the dielectric layer. The invention also relates to a method of operating such a device. Such a device is known, for example, from U.S. Pat. No. 5,115,458.
Charge-coupled devices or CCDs are generally known nowadays and have various fields of application. The main application is in cameras, both for professional purposes and for consumer purposes, in which the charge-coupled device is used as an image transducer by which a projected radiation image is converted into electrical signals. Although the invention should not be regarded as limited to image transducers, it is indeed explained below with reference to image transducers because of the particular advantages obtained in this CCD application through the invention. It will be perfectly obvious, however, that the invention also offers major advantages in other applications.
The three-layer construction with a substrate and a buried CCD channel of the one conductivity type, for example the n-type, separated from one another by an interposed region of the p-type in image transducers has the advantage that the excess charge caused by overexposure can be drained off through the substrate (vertical antiblooming) and that the exposure time, if so desired, may be adjusted in that charge generated during a certain portion of the maximum exposure time is drained off through the substrate (charge reset). An alternative CCD type with a three-layer construction is described inter alia in the article "1 GHz CCD transient detector" by Sankaranarayanan et al., presented at the IEDM '91, digest pp. 179/182. This relates to a high-frequency shift register with parallel channels in which excess charge packages are drained off through the substrate during demultiplexing.
It is generally known that in charge-coupled devices electrical signals are formed by packages of electric charge carriers which are stored in a depletion region induced at the surface. These packages comprise not only a signal component but also a component not equal to zero which is caused by leakage currents or dark currents. The generation of these leakage currents takes place for the major part in the depletion region, and in particular at the surface where the concentration of defects and of the accompanying states in the forbidden band in the energy diagram is comparatively high at the interface between the semiconductor and the gate dielectric. It is desirable to keep the dark currents as low as possible in general for reasons which are apparent per se such as, for example, the dynamic range of the signals or the maximum time during which a signal can be stored without regeneration.
The distribution of surface states is usually not uniform over the surface of the device, which means that the leakage currents may vary strongly depending on location. When the device is used as a shift register, in which the charge packages are stored in the various charge storage locations for approximately equal periods, these non-uniformities of the leakage current are more or less averaged out, whereby the various charge packages have each integrated an approximately equal leakage current at the output of the register, which can be compensated for through shifting of the DC level of the read-out signals. In a CCD image transducer, for example of the FT type, the pattern of charge packages is not moved during a comparatively long integration period in which the image is detected and convened into discrete charge packages. After the integration period, the charge pattern formed is transported to a memory section in a comparatively very short time. Since each charge package is stored in a given charge storage location acting as an image transducer element for a comparatively long time and during a much shorter time in other charge storage locations during transport, the said averaging-out of the leakage current over a large number of charge storage locations does not take place. This means that the non-uniformity of the leakage current becomes visible on a display screen (fixed pattern noise or FPN) when the converted image is displayed on this screen. In the case of a local defect, the dark current may lead to a complete filling of the relevant charge storage location with charge also without absorption of electromagnetic radiation, which results in a very unpleasant white spot on the display screen.
The cited U.S. Pat. No. 5,115,458 discloses an n-channel CCD image transducer in which the clock electrodes are set to such a low voltage during the integration time that the surface below the clock electrodes is inverted, a layer of holes being stored at the interface. As is described in the U.S. Patent, the dark current is substantially entirely suppressed, at least in as far as it results from surface states, because the surface is now no longer depleted.
In an embodiment of the known device having an n-type channel in a p-type zone provided in an n-type substrate, an excess charge caused by overexposure can be drained off through the substrate in the manner described above. Problems arise, however, in the case of the charge reset also described above owing to the inversion of the surface. The obvious method of removing all charge from the imaging section is to apply a negative voltage pulse to the clock electrodes of the imaging section whereby the electrons are "pushed" into the substrate, which itself was set for a positive bias voltage. This method cannot be used, however, in combination with the dark current reduction described because the surface potential is pinned to the voltage value of the p-type zone bounding the n-type channel by the inversion layer. A reduction of the gate voltage further than the threshold voltage will not or hardly cause the surface potential to drop further, so that it is impossible to remove the electrons.